Among electrical programmable and erasable nonvolatile semiconductor memory devices, flash memories are known in the art as the one capable of bulk erasing. Since the flash memories are excellent in portability as well as impact resistance and capable of electrical bulk erasing, they are rapidly growing in demand in recent years as memory devices to be used for personal digital assistances such as a mobile personal computer and a digital still camera. One of the important factors in expanding the market for the flash memories is a reduction in bit cost by way of a reduction in memory cell area. For example, as is mentioned in “Applied Physics”, Vol. 65, No. 11, pp. 1114–1124, published by The Japan Society of Applied Physics on Jan. 10, 1996, various memory cell technologies which realize the reduction in bit cost have heretofore been proposed.